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    Subject[PATCH 5.2 015/162] mips: fix cacheinfo
    Date
    [ Upstream commit b8bea8a5e5d942e62203416ab41edecaed4fda02 ]

    Because CONFIG_OF defined for MIPS, cacheinfo attempts to fill information
    from DT, ignoring data filled by architecture routine. This leads to error
    reported

    cacheinfo: Unable to detect cache hierarchy for CPU 0

    Way to fix this provided in
    commit fac51482577d ("drivers: base: cacheinfo: fix x86 with
    CONFIG_OF enabled")

    Utilize same mechanism to report that cacheinfo set by architecture
    specific function

    Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@linux.intel.com>
    Signed-off-by: Paul Burton <paul.burton@mips.com>
    Cc: Ralf Baechle <ralf@linux-mips.org>
    Cc: James Hogan <jhogan@kernel.org>
    Cc: linux-mips@vger.kernel.org
    Cc: linux-kernel@vger.kernel.org
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/mips/kernel/cacheinfo.c | 2 ++
    1 file changed, 2 insertions(+)

    diff --git a/arch/mips/kernel/cacheinfo.c b/arch/mips/kernel/cacheinfo.c
    index e0dd66881da68..f777e44653d57 100644
    --- a/arch/mips/kernel/cacheinfo.c
    +++ b/arch/mips/kernel/cacheinfo.c
    @@ -69,6 +69,8 @@ static int __populate_cache_leaves(unsigned int cpu)
    if (c->tcache.waysize)
    populate_cache(tcache, this_leaf, 3, CACHE_TYPE_UNIFIED);

    + this_cpu_ci->cpu_map_populated = true;
    +
    return 0;
    }

    --
    2.20.1


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