lkml.org 
[lkml]   [2019]   [Aug]   [22]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH v2 1/4] iommu/arm-smmu: Introduce wrapper for writeq/readq
From
Date
On 20/08/2019 13:08, Will Deacon wrote:
> Hi Gregory, Hanna,
>
> On Thu, Jul 11, 2019 at 05:02:39PM +0200, Gregory CLEMENT wrote:
>> From: Hanna Hawa <hannah@marvell.com>
>>
>> This patch introduces the smmu_writeq_relaxed/smmu_readq_relaxed
>> helpers, as preparation to add specific Marvell work-around for
>> accessing 64 bits width registers of ARM SMMU.
>>
>> Signed-off-by: Hanna Hawa <hannah@marvell.com>
>> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
>> ---
>> drivers/iommu/arm-smmu.c | 36 +++++++++++++++++++++++++++---------
>> 1 file changed, 27 insertions(+), 9 deletions(-)
>
> Sorry for the delay in replying to this -- Robin's been reworking the driver
> so that implementation quirks can be specified more cleanly. Please can you
> take a look at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/log/?h=for-joerg/arm-smmu/refactoring
>
> and try to respin your patches on top of that?

Right, the arm_smmu_impl design was specifically anticipating this quirk
as well - it should just be a case of a cfg_probe hook to hide the
features which can't work, plus {read,write}_reg64 hooks to override any
remaining 64-bit accesses with the explicit hi_lo_* variants, munged
together (either statically or dynamically) with the standard MMU-500 hooks.

Robin.

\
 
 \ /
  Last update: 2019-08-22 16:30    [W:0.537 / U:0.212 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site