Messages in this thread | | | From | "Lendacky, Thomas" <> | Subject | Re: [PATCH] perf/x86/amd: Change NMI latency mitigation to use a timestamp | Date | Fri, 2 Aug 2019 14:33:41 +0000 |
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On 8/1/19 4:59 PM, Thomas Gleixner wrote: > On Thu, 1 Aug 2019, Peter Zijlstra wrote: >> On Thu, Aug 01, 2019 at 11:34:23PM +0200, Thomas Gleixner wrote: >>> Avoid the whole NMI mess, make the PMC interrupt a proper vector in the >>> highest prio bucket and instead of using CLI/STI use CR8. That would have >>> the additional advantage that we could prevent perf "NMI" then occsionally :) >> >> Exactly, and not only the PMC, we can basically start giving out actual >> vectors on register_nmi_handler() and do away with all that shared line >> crap. >> >> And then the actual NMI line will be mostly empty again, and it can read >> its stupid slow reason port again. >> >> One complication though; IRET et al only do EFLAGS, not CR8, so that's >> going to be massive fun :-(
Talking to the hardware folks, they say setting CR8 is a serializing instruction and has to communicate out to the APIC, so it's better to use CLI/STI.
Thanks, Tom
>> >> Did I say I hates the x86 interrupt scheme? > > You're not alone. > > That stuff definitely violates article 3 of the Convention for the > Protection of Human Rights and Fundamental Freedoms. > >
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