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    Subject[PATCH V5 1/4] mmc: sdhci: Change timeout of loop for checking internal clock stable
    Date
    From: Ben Chuang <ben.chuang@genesyslogic.com.tw>

    According to section 3.2.1 internal clock setup in SD Host Controller
    Simplified Specifications 4.20, the timeout of loop for checking
    internal clock stable is defined as 150ms.

    Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
    Co-developed-by: Michael K Johnson <johnsonm@danlj.org>
    Signed-off-by: Michael K Johnson <johnsonm@danlj.org>
    ---
    drivers/mmc/host/sdhci.c | 4 ++--
    1 file changed, 2 insertions(+), 2 deletions(-)

    diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
    index 59acf8e3331e..bed0760a6c2a 100644
    --- a/drivers/mmc/host/sdhci.c
    +++ b/drivers/mmc/host/sdhci.c
    @@ -1636,8 +1636,8 @@ void sdhci_enable_clk(struct sdhci_host *host, u16 clk)
    clk |= SDHCI_CLOCK_INT_EN;
    sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);

    - /* Wait max 20 ms */
    - timeout = ktime_add_ms(ktime_get(), 20);
    + /* Wait max 150 ms */
    + timeout = ktime_add_ms(ktime_get(), 150);
    while (1) {
    bool timedout = ktime_after(ktime_get(), timeout);

    --
    2.22.1
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