lkml.org 
[lkml]   [2019]   [Aug]   [14]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 22/22] arm64: dts: qcom: sm8150: Add APSS shared mailbox
    Date
    From: Sibi Sankar <sibis@codeaurora.org>

    Add APSS shared mailbox support to SM8150 SoC.

    Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
    Signed-off-by: Vinod Koul <vkoul@kernel.org>
    ---
    arch/arm64/boot/dts/qcom/sm8150.dtsi | 11 +++++++++++
    1 file changed, 11 insertions(+)

    diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
    index 5df3f335272a..88cbab4a9297 100644
    --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
    +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
    @@ -5,6 +5,7 @@
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/qcom,gcc-sm8150.h>
    #include <dt-bindings/soc/qcom,rpmh-rsc.h>
    +#include <dt-bindings/clock/qcom,rpmh.h>

    / {
    interrupt-parent = <&intc>;
    @@ -338,6 +339,16 @@
    #interrupt-cells = <2>;
    };

    + aoss_qmp: qmp@c300000 {
    + compatible = "qcom,sm8150-aoss-qmp";
    + reg = <0x0c300000 0x100000>;
    + interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
    + mboxes = <&apss_shared 0>;
    +
    + #clock-cells = <0>;
    + #power-domain-cells = <1>;
    + };
    +
    intc: interrupt-controller@17a00000 {
    compatible = "arm,gic-v3";
    interrupt-controller;
    --
    2.20.1
    \
     
     \ /
      Last update: 2019-08-14 14:53    [W:5.772 / U:0.004 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site