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    Subject[PATCH v4 06/10] dt-bindings: sdm845-pinctrl: add wakeup interrupt parent for GPIO
    Date
    SDM845 SoC has an always-on interrupt controller (PDC) with select GPIO
    routed to the PDC as interrupts that can be used to wake the system up
    from deep low power modes and suspend.

    Cc: devicetree@vger.kernel.org
    Signed-off-by: Lina Iyer <ilina@codeaurora.org>
    ---
    .../devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt | 7 ++++++-
    1 file changed, 6 insertions(+), 1 deletion(-)

    diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
    index 665aadb5ea28..f0fedbc5d41a 100644
    --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
    +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
    @@ -29,6 +29,11 @@ SDM845 platform.
    Definition: must be 2. Specifying the pin number and flags, as defined
    in <dt-bindings/interrupt-controller/irq.h>

    +- wakeup-parent:
    + Usage: optional
    + Value type: <phandle>
    + Definition: A phandle to the wakeup interrupt controller for the SoC.
    +
    - gpio-controller:
    Usage: required
    Value type: <none>
    @@ -53,7 +58,6 @@ pin, a group, or a list of pins or groups. This configuration can include the
    mux function to select on those pin(s)/group(s), and various pin configuration
    parameters, such as pull-up, drive strength, etc.

    -
    PIN CONFIGURATION NODES:

    The name of each subnode is not important; all subnodes should be enumerated
    @@ -160,6 +164,7 @@ Example:
    #gpio-cells = <2>;
    interrupt-controller;
    #interrupt-cells = <2>;
    + wake-parent = <&pdc_intc>;

    qup9_active: qup9-active {
    mux {
    --
    The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
    a Linux Foundation Collaborative Project
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