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    Subject[PATCH v5 22/22] ARM: dts: sun8i-h3: Add Video Engine and reserved memory nodes
    Date
    This adds nodes for the Video Engine and the associated reserved memory
    for the H3. Up to 96 MiB of memory are dedicated to the CMA pool.

    Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
    ---
    arch/arm/boot/dts/sun8i-h3.dtsi | 27 +++++++++++++++++++++++++++
    1 file changed, 27 insertions(+)

    diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
    index c93f6be40533..02ed77b311e5 100644
    --- a/arch/arm/boot/dts/sun8i-h3.dtsi
    +++ b/arch/arm/boot/dts/sun8i-h3.dtsi
    @@ -110,6 +110,20 @@
    <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
    };

    + reserved-memory {
    + #address-cells = <1>;
    + #size-cells = <1>;
    + ranges;
    +
    + cma_pool: cma@4a000000 {
    + compatible = "shared-dma-pool";
    + size = <0x6000000>;
    + alloc-ranges = <0x4a000000 0x6000000>;
    + reusable;
    + linux,cma-default;
    + };
    + };
    +
    soc {
    system-control@1c00000 {
    compatible = "allwinner,sun8i-h3-system-control",
    @@ -134,6 +148,19 @@
    };
    };

    + vpu: video-codec@01c0e000 {
    + compatible = "allwinner,sun8i-h3-video-engine";
    + reg = <0x01c0e000 0x1000>;
    +
    + clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
    + <&ccu CLK_DRAM_VE>;
    + clock-names = "ahb", "mod", "ram";
    +
    + resets = <&ccu RST_BUS_VE>;
    + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
    + allwinner,sram = <&ve_sram 1>;
    + };
    +
    mali: gpu@1c40000 {
    compatible = "allwinner,sun8i-h3-mali", "arm,mali-400";
    reg = <0x01c40000 0x10000>;
    --
    2.17.1
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