Messages in this thread | | | Date | Sat, 30 Jun 2018 11:24:03 +0200 (CEST) | From | Thomas Gleixner <> | Subject | Re: [PATCH v1 0/6] x86/tsc: Clean up legacy code for Intel MID |
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On Fri, 29 Jun 2018, Andy Shevchenko wrote:
> As Thomas noticed there is unusual initialization is going on on Intel MID > platforms when TSC is being calibrated. > > It appears that we have tsc_msr.c to support Intel MID in a more generic way. > > So, this patch series removes legacy calibration code and does accompanying > clean ups. > > Has been tested on Intel Medfield and Intel Merrifield platforms.
Nice series from a quick glance! I'll have a deeper look on monday.
One thing on top. From your earlier reply:
> This sounds like a stub against very old calibration code since Intel > MID has no PIT, HPET, PMTIMER to calibrate from.
As we already know that the legacy calibration cannot work on those machines, we really should splt out the msr/cpuid based calibration method into a separate function, which is set for the intel MID stuff and called from native_calibrate_tsc/cpu.
Hmm?
Thanks,
tglx
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