Messages in this thread | | | From | Naga Sureshkumar Relli <> | Subject | RE: [[LINUX PATCH v10] 1/4] Devicetree: Add pl353 smc controller devicetree binding information | Date | Thu, 28 Jun 2018 07:56:55 +0000 |
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Hi Linus,
Thanks for the review.
> -----Original Message----- > From: Linus Walleij [mailto:linus.walleij@linaro.org] > Sent: Thursday, June 28, 2018 12:24 PM > To: Naga Sureshkumar Relli <nagasure@xilinx.com> > Cc: Boris Brezillon <boris.brezillon@bootlin.com>; Richard Weinberger <richard@nod.at>; > David Woodhouse <dwmw2@infradead.org>; Brian Norris > <computersforpeace@gmail.com>; Mark Vasut <marek.vasut@gmail.com>; Florian Fainelli > <f.fainelli@gmail.com>; Markus Mayer <mmayer@broadcom.com>; Roger Quadros > <rogerq@ti.com>; Ladislav Michl <ladis@linux-mips.org>; ada@thorsis.com; > honghui.zhang@mediatek.com; Miquèl Raynal <miquel.raynal@bootlin.com>; linux- > mtd@lists.infradead.org; linux-kernel@vger.kernel.org; nagasureshkumarrelli@gmail.com; > Michal Simek <michals@xilinx.com> > Subject: Re: [[LINUX PATCH v10] 1/4] Devicetree: Add pl353 smc controller devicetree > binding information > > On Thu, Jun 21, 2018 at 8:43 AM Naga Sureshkumar Relli > <naga.sureshkumar.relli@xilinx.com> wrote: > > Thanks for your patch! > > > Add pl353 static memory controller devicetree binding information. > > > > Signed-off-by: Naga Sureshkumar Relli > > <naga.sureshkumar.relli@xilinx.com> > > +Device tree bindings for ARM PL353 static memory controller > > + > > +PL353 static memory controller supports two kinds of memory > > +interfaces.i.e NAND and SRAM/NOR interfaces. > > +The actual devices are instantiated from the child nodes of pl353 smc node. > > See and reference the special PrimeCell DT bindings: > Documentation/devicetree/bindings/arm/primecell.txt > > > +Required properties: > > +- compatible : Must be "arm,pl353-smc-r2p1" > > Should be: > > "arm,pl353-smc-r2p1", "arm,primecell"; > > It will be possible for the Linux AMBA core to probe the device from just reading out the > primecell ID registers, so the first compatible string will not even be used by many OS:es. Thanks for pointing the primecell.txt, will append the "arm,primecell" entry in next version. > > > +- reg : Controller registers map and length. > > +- clock-names : List of input clock names - "ref_clk", "aper_clk" > > + (See clock bindings for details). > > The AMBA primecell peripheral clock (clocking the silicon) must be named "apb_pclk". Ok, will update in next version. > > > +- clocks : Clock phandles (see clock bindings for details). > > +- address-cells : Must be 1. > > +- size-cells : Must be 1. > > + > > +Child nodes: > > + For NAND the "arm,pl353-nand-r2p1" and for NOR the "cfi-flash" > > +drivers are supported as child nodes. > > + > > +for NAND partition information please refer the below file > > +Documentation/devicetree/bindings/mtd/partition.txt > > + > > +Example: > > + smcc: memory-controller@e000e000 > > + compatible = "arm,pl353-smc-r2p1" > > Add , "arm,primecell"; Ok. Will update in next version. > > > + clock-names = "memclk", "aclk"; > > This doesn't even have the same name as in the bindings above, I think the latter should be > named "apb_pclk". Ok, it’s a mistake, I will correct it in next version. > > Otherwise it looks good! > > Yours, > Linus Walleij
Thanks for your review.
Thanks, Naga Sureshkumar Relli
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