Messages in this thread | | | Subject | Re: [intel-sgx-kernel-dev] [PATCH v11 09/13] x86, sgx: basic routines for enclave page cache | From | Jarkko Sakkinen <> | Date | Mon, 25 Jun 2018 10:36:47 +0300 |
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On Mon, 2018-06-18 at 14:33 -0700, Andy Lutomirski wrote: > When KVM host support goes in, even this won't be good enough if we > want to allow passthrough access to the MSRs because we will no longer > be able to guarantee that all zeros is invalid. Instead we'd need an > actual flag saying that the cache is invalid.
I'm not sure if I understood this part. If it was pass-through, and there was a flag, how that flag in the host would get updated?
/Jarkko
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