Messages in this thread | | | From | David Laight <> | Subject | RE: [RFC PATCH 1/8] x86/cpufeatures: Enumerate MOVDIRI instruction | Date | Mon, 25 Jun 2018 16:13:42 +0000 |
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From: Fenghua Yu > Sent: 19 June 2018 22:37 > To: Thomas Gleixner > Cc: Fenghua Yu; Ingo Molnar; H Peter Anvin; Ashok Raj; Alan Cox; Ravi V Shankar; linux-kernel; x86 > Subject: Re: [RFC PATCH 1/8] x86/cpufeatures: Enumerate MOVDIRI instruction > > On Tue, Jun 19, 2018 at 10:57:44AM +0200, Thomas Gleixner wrote: > > On Fri, 15 Jun 2018, Fenghua Yu wrote: > > > > > MOVDIRI moves doubleword or quadword from register to memory through > > > direct store which is implemented by using write combining (WC) for > > > writing data directly into memory without caching the data. > > > > And that is useful for what? > > Programmable agents can handle streaming offload (e.g. high speed packet > processing in network). Hardware implements a doorbell (tail pointer) > register that is updated by software when adding new work-elements to > the streaming offload work-queue. > > MOVDIRI can be used as the doorbell write which is a 4-byte or 8-byte > uncachable write to MMIO. MOVDIRI has lower overhead than other ways > to write the doorbell.
I'd have thought that it wouldn't make any significant difference for uncached accesses to device registers.
> In low latency offload (e.g. Non-Volatile Memory, etc), MOVDIR64B writes > work descriptors (and data in some cases) to device-hosted work-queues > with atomicity.
More likely it is useful more writing to memory without polluting the data cache. This might be because the programmer knows the data won't be read for a long time (at least by the cpu in question). It might also be useful to avoid a lot of cache snooping on data that will be accessed by hardware - especially if the hardware is also likely to be writing to the same cache line.
I can also just about imagine MOVDIR64B being useful for generating 64 byte PCIe TLP to optimise memcpy_to/fromio() without needing an AVX512 register.
David
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