Messages in this thread | | | Subject | Re: [RFC PATCH] locking/atomics/powerpc: Introduce optimized cmpxchg_release() family of APIs for PowerPC | From | Benjamin Herrenschmidt <> | Date | Sun, 06 May 2018 11:56:44 +1000 |
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On Sat, 2018-05-05 at 12:00 +0200, Ingo Molnar wrote: > This clearly suggests that PPC_RELEASE_BARRIER is in active use and 'lwsync' is > the 'release barrier' instruction, if I interpreted that right.
The closest to one we got.
The semantics are that it orders all load/store pairs to cachable storage except store+load.
Cheers, Ben.
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