Messages in this thread Patch in this message | | | From | David Wang <> | Subject | [PATCH] x86/mce: add CMCI support for Centaur CPUs | Date | Thu, 31 May 2018 11:28:58 +0800 |
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Newer Centaur support CMCI mechanism, which is compatible with INTEL CMCI.
Signed-off-by: David Wang <davidwang@zhaoxin.com> --- arch/x86/Kconfig | 12 ++++++++++++ arch/x86/kernel/cpu/mcheck/mce.c | 6 ++++++ 2 files changed, 18 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index dda87a3..1adff5f 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1130,6 +1130,18 @@ config X86_MCE_AMD Additional support for AMD specific MCE features such as the DRAM Error Threshold. +config X86_MCE_CENTAUR + def_bool y + prompt "CENTAUR MCE features" + depends on CPU_SUP_CENTAUR && X86_MCE_INTEL + help + Additional support for Centaur specific MCE features such as + MCE broadcasting and CMCI support. + New Centaur CPU support MCE broadcasting. + New Centaur CPU support CMCI which is fully compliant with Intel CMCI. + + If unsure, say N here. + config X86_ANCIENT_MCE bool "Support for old Pentium 5 / WinChip machine checks" depends on X86_32 && X86_MCE diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index cd76380..2ebafc7 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -1727,6 +1727,7 @@ static void __mcheck_cpu_init_early(struct cpuinfo_x86 *c) } } +#ifdef CONFIG_X86_MCE_CENTAUR static void mce_centaur_feature_init(struct cpuinfo_x86 *c) { struct mca_config *cfg = &mca_cfg; @@ -1740,7 +1741,12 @@ static void mce_centaur_feature_init(struct cpuinfo_x86 *c) if (cfg->monarch_timeout < 0) cfg->monarch_timeout = USEC_PER_SEC; } + mce_intel_feature_init(c); + mce_adjust_timer = cmci_intel_adjust_timer; } +#else +static inline void mce_centaur_feature_init(struct cpuinfo_x86 *c) { } +#endif static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c) { -- 1.9.1
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