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    Subject[PATCH 4.16 107/110] x86/speculation, KVM: Implement support for VIRT_SPEC_CTRL/LS_CFG
    Date
    4.16-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Thomas Gleixner <tglx@linutronix.de>

    commit 47c61b3955cf712cadfc25635bf9bc174af030ea upstream

    Add the necessary logic for supporting the emulated VIRT_SPEC_CTRL MSR to
    x86_virt_spec_ctrl(). If either X86_FEATURE_LS_CFG_SSBD or
    X86_FEATURE_VIRT_SPEC_CTRL is set then use the new guest_virt_spec_ctrl
    argument to check whether the state must be modified on the host. The
    update reuses speculative_store_bypass_update() so the ZEN-specific sibling
    coordination can be reused.

    Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    arch/x86/include/asm/spec-ctrl.h | 6 ++++++
    arch/x86/kernel/cpu/bugs.c | 30 ++++++++++++++++++++++++++++++
    2 files changed, 36 insertions(+)

    --- a/arch/x86/include/asm/spec-ctrl.h
    +++ b/arch/x86/include/asm/spec-ctrl.h
    @@ -53,6 +53,12 @@ static inline u64 ssbd_tif_to_spec_ctrl(
    return (tifn & _TIF_SSBD) >> (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT);
    }

    +static inline unsigned long ssbd_spec_ctrl_to_tif(u64 spec_ctrl)
    +{
    + BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT);
    + return (spec_ctrl & SPEC_CTRL_SSBD) << (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT);
    +}
    +
    static inline u64 ssbd_tif_to_amd_ls_cfg(u64 tifn)
    {
    return (tifn & _TIF_SSBD) ? x86_amd_ls_cfg_ssbd_mask : 0ULL;
    --- a/arch/x86/kernel/cpu/bugs.c
    +++ b/arch/x86/kernel/cpu/bugs.c
    @@ -162,6 +162,36 @@ x86_virt_spec_ctrl(u64 guest_spec_ctrl,
    wrmsrl(MSR_IA32_SPEC_CTRL, msrval);
    }
    }
    +
    + /*
    + * If SSBD is not handled in MSR_SPEC_CTRL on AMD, update
    + * MSR_AMD64_L2_CFG or MSR_VIRT_SPEC_CTRL if supported.
    + */
    + if (!static_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
    + !static_cpu_has(X86_FEATURE_VIRT_SSBD))
    + return;
    +
    + /*
    + * If the host has SSBD mitigation enabled, force it in the host's
    + * virtual MSR value. If its not permanently enabled, evaluate
    + * current's TIF_SSBD thread flag.
    + */
    + if (static_cpu_has(X86_FEATURE_SPEC_STORE_BYPASS_DISABLE))
    + hostval = SPEC_CTRL_SSBD;
    + else
    + hostval = ssbd_tif_to_spec_ctrl(ti->flags);
    +
    + /* Sanitize the guest value */
    + guestval = guest_virt_spec_ctrl & SPEC_CTRL_SSBD;
    +
    + if (hostval != guestval) {
    + unsigned long tif;
    +
    + tif = setguest ? ssbd_spec_ctrl_to_tif(guestval) :
    + ssbd_spec_ctrl_to_tif(hostval);
    +
    + speculative_store_bypass_update(tif);
    + }
    }
    EXPORT_SYMBOL_GPL(x86_virt_spec_ctrl);


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