lkml.org 
[lkml]   [2018]   [May]   [16]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Date
SubjectRe: [PATCH v7 13/14] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu
On Tue, May 15, 2018 at 12:13 PM, Ilia Lin <ilialin@codeaurora.org> wrote:
> In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996
> that have KRYO processors, the CPU ferequencies subset and voltage value

s/ferequencies/frequency

> of each OPP varies based on the silicon variant in use.
> Qualcomm Technologies, Inc. Process Voltage Scaling Tables
> defines the voltage and frequency value based on the msm-id in SMEM
> and speedbin blown in the efuse combination.
> The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC
> to provide the OPP framework with required information.
> This is used to determine the voltage and frequency value for each OPP of
> operating-points-v2 table when it is parsed by the OPP framework.
>
> This change adds documentation.

Change this to actually document the extension of the op-v2 binding
with a list of compatible HW.

> Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
> ---
> .../devicetree/bindings/opp/kryo-cpufreq.txt | 680 +++++++++++++++++++++
> 1 file changed, 680 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
>
> diff --git a/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt b/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> new file mode 100644
> index 0000000..c2127b9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> @@ -0,0 +1,680 @@
> +Qualcomm Technologies, Inc. KRYO CPUFreq and OPP bindings
> +===================================
> +
> +In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996
> +that have KRYO processors, the CPU ferequencies subset and voltage value
> +of each OPP varies based on the silicon variant in use.
> +Qualcomm Technologies, Inc. Process Voltage Scaling Tables
> +defines the voltage and frequency value based on the msm-id in SMEM
> +and speedbin blown in the efuse combination.
> +The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the SoC
> +to provide the OPP framework with required information (existing HW bitmap).
> +This is used to determine the voltage and frequency value for each OPP of
> +operating-points-v2 table when it is parsed by the OPP framework.
> +
> +Required properties:
> +--------------------
> +In 'cpus' nodes:
> +- operating-points-v2: Phandle to the operating-points-v2 table to use.
> +
> +In 'operating-points-v2' table:
> +- compatible: Should be
> + - 'operating-points-v2-kryo-cpu' for apq8096 and msm8996.
> +- nvmem-cells: A phandle pointing to a nvmem-cells node representing the
> + efuse registers that has information about the
> + speedbin that is used to select the right frequency/voltage
> + value pair.
> + Please refer the for nvmem-cells
> + bindings Documentation/devicetree/bindings/nvmem/nvmem.txt
> + and also examples below.
> +
> +In every OPP node:
> +- opp-supported-hw: A single 32 bit bitmap value, representing compatible HW.
> + Bitmap:
> + 0: MSM8996 V3, speedbin 0
> + 1: MSM8996 V3, speedbin 1
> + 2: MSM8996 V3, speedbin 2
> + 3: unused
> + 4: MSM8996 SG, speedbin 0
> + 5: MSM8996 SG, speedbin 1
> + 6: MSM8996 SG, speedbin 2
> + 7-31: unused
> +
> +Example 1:
> +---------
> +
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + CPU0: cpu@0 {
> + device_type = "cpu";
> + compatible = "qcom,kryo";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + clocks = <&kryocc 0>;
> + cpu-supply = <&pm8994_s11_saw>;
> + operating-points-v2 = <&cluster0_opp>;
> + #cooling-cells = <2>;
> + next-level-cache = <&L2_0>;
> + L2_0: l2-cache {
> + compatible = "cache";
> + cache-level = <2>;
> + };
> + };
> +
> + CPU1: cpu@1 {
> + device_type = "cpu";
> + compatible = "qcom,kryo";
> + reg = <0x0 0x1>;
> + enable-method = "psci";
> + clocks = <&kryocc 0>;
> + cpu-supply = <&pm8994_s11_saw>;
> + operating-points-v2 = <&cluster0_opp>;
> + #cooling-cells = <2>;
> + next-level-cache = <&L2_0>;
> + };
> +
> + CPU2: cpu@100 {
> + device_type = "cpu";
> + compatible = "qcom,kryo";
> + reg = <0x0 0x100>;
> + enable-method = "psci";
> + clocks = <&kryocc 1>;
> + cpu-supply = <&pm8994_s11_saw>;
> + operating-points-v2 = <&cluster1_opp>;
> + #cooling-cells = <2>;
> + next-level-cache = <&L2_1>;
> + L2_1: l2-cache {
> + compatible = "cache";
> + cache-level = <2>;
> + };
> + };
> +
> + CPU3: cpu@101 {
> + device_type = "cpu";
> + compatible = "qcom,kryo";
> + reg = <0x0 0x101>;
> + enable-method = "psci";
> + clocks = <&kryocc 1>;
> + cpu-supply = <&pm8994_s11_saw>;
> + operating-points-v2 = <&cluster1_opp>;
> + #cooling-cells = <2>;
> + next-level-cache = <&L2_1>;
> + };
> +
> + cpu-map {
> + cluster0 {
> + core0 {
> + cpu = <&CPU0>;
> + };
> +
> + core1 {
> + cpu = <&CPU1>;
> + };
> + };
> +
> + cluster1 {
> + core0 {
> + cpu = <&CPU2>;
> + };
> +
> + core1 {
> + cpu = <&CPU3>;
> + };
> + };
> + };
> + };
> +
> + cluster0_opp: opp_table0 {
> + compatible = "operating-points-v2-kryo-cpu";
> + nvmem-cells = <&speedbin_efuse>;
> + opp-shared;
> +
> + opp-307200000 {
> + opp-hz = /bits/ 64 <307200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x77>;
> + clock-latency-ns = <200000>;
> + };
> + opp-384000000 {
> + opp-hz = /bits/ 64 <384000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-422400000 {
> + opp-hz = /bits/ 64 <422400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-460800000 {
> + opp-hz = /bits/ 64 <460800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-480000000 {
> + opp-hz = /bits/ 64 <480000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-537600000 {
> + opp-hz = /bits/ 64 <537600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-556800000 {
> + opp-hz = /bits/ 64 <556800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-614400000 {
> + opp-hz = /bits/ 64 <614400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-652800000 {
> + opp-hz = /bits/ 64 <652800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-691200000 {
> + opp-hz = /bits/ 64 <691200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-729600000 {
> + opp-hz = /bits/ 64 <729600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-768000000 {
> + opp-hz = /bits/ 64 <768000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-844800000 {
> + opp-hz = /bits/ 64 <844800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x77>;
> + clock-latency-ns = <200000>;
> + };
> + opp-902400000 {
> + opp-hz = /bits/ 64 <902400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-960000000 {
> + opp-hz = /bits/ 64 <960000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-979200000 {
> + opp-hz = /bits/ 64 <979200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1036800000 {
> + opp-hz = /bits/ 64 <1036800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1056000000 {
> + opp-hz = /bits/ 64 <1056000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1113600000 {
> + opp-hz = /bits/ 64 <1113600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1132800000 {
> + opp-hz = /bits/ 64 <1132800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1190400000 {
> + opp-hz = /bits/ 64 <1190400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1209600000 {
> + opp-hz = /bits/ 64 <1209600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1228800000 {
> + opp-hz = /bits/ 64 <1228800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1286400000 {
> + opp-hz = /bits/ 64 <1286400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1324800000 {
> + opp-hz = /bits/ 64 <1324800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x5>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1363200000 {
> + opp-hz = /bits/ 64 <1363200000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x72>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1401600000 {
> + opp-hz = /bits/ 64 <1401600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x5>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1440000000 {
> + opp-hz = /bits/ 64 <1440000000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1478400000 {
> + opp-hz = /bits/ 64 <1478400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x1>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1497600000 {
> + opp-hz = /bits/ 64 <1497600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x4>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1516800000 {
> + opp-hz = /bits/ 64 <1516800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1593600000 {
> + opp-hz = /bits/ 64 <1593600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x71>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1996800000 {
> + opp-hz = /bits/ 64 <1996800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x20>;
> + clock-latency-ns = <200000>;
> + };
> + opp-2188800000 {
> + opp-hz = /bits/ 64 <2188800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x10>;
> + clock-latency-ns = <200000>;
> + };
> + };
> +
> + cluster1_opp: opp_table1 {
> + compatible = "operating-points-v2-kryo-cpu";
> + nvmem-cells = <&speedbin_efuse>;
> + opp-shared;
> +
> + opp-307200000 {
> + opp-hz = /bits/ 64 <307200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x77>;
> + clock-latency-ns = <200000>;
> + };
> + opp-384000000 {
> + opp-hz = /bits/ 64 <384000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-403200000 {
> + opp-hz = /bits/ 64 <403200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-460800000 {
> + opp-hz = /bits/ 64 <460800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-480000000 {
> + opp-hz = /bits/ 64 <480000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-537600000 {
> + opp-hz = /bits/ 64 <537600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-556800000 {
> + opp-hz = /bits/ 64 <556800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-614400000 {
> + opp-hz = /bits/ 64 <614400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-652800000 {
> + opp-hz = /bits/ 64 <652800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-691200000 {
> + opp-hz = /bits/ 64 <691200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-729600000 {
> + opp-hz = /bits/ 64 <729600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-748800000 {
> + opp-hz = /bits/ 64 <748800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-806400000 {
> + opp-hz = /bits/ 64 <806400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-825600000 {
> + opp-hz = /bits/ 64 <825600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-883200000 {
> + opp-hz = /bits/ 64 <883200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-902400000 {
> + opp-hz = /bits/ 64 <902400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-940800000 {
> + opp-hz = /bits/ 64 <940800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-979200000 {
> + opp-hz = /bits/ 64 <979200000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1036800000 {
> + opp-hz = /bits/ 64 <1036800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1056000000 {
> + opp-hz = /bits/ 64 <1056000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1113600000 {
> + opp-hz = /bits/ 64 <1113600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1132800000 {
> + opp-hz = /bits/ 64 <1132800000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1190400000 {
> + opp-hz = /bits/ 64 <1190400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1209600000 {
> + opp-hz = /bits/ 64 <1209600000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1248000000 {
> + opp-hz = /bits/ 64 <1248000000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1286400000 {
> + opp-hz = /bits/ 64 <1286400000>;
> + opp-microvolt = <905000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1324800000 {
> + opp-hz = /bits/ 64 <1324800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1363200000 {
> + opp-hz = /bits/ 64 <1363200000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1401600000 {
> + opp-hz = /bits/ 64 <1401600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1440000000 {
> + opp-hz = /bits/ 64 <1440000000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1478400000 {
> + opp-hz = /bits/ 64 <1478400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1516800000 {
> + opp-hz = /bits/ 64 <1516800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1555200000 {
> + opp-hz = /bits/ 64 <1555200000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1593600000 {
> + opp-hz = /bits/ 64 <1593600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1632000000 {
> + opp-hz = /bits/ 64 <1632000000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1670400000 {
> + opp-hz = /bits/ 64 <1670400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1708800000 {
> + opp-hz = /bits/ 64 <1708800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1747200000 {
> + opp-hz = /bits/ 64 <1747200000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x70>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1785600000 {
> + opp-hz = /bits/ 64 <1785600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x7>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1804800000 {
> + opp-hz = /bits/ 64 <1804800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x6>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1824000000 {
> + opp-hz = /bits/ 64 <1824000000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x71>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1900800000 {
> + opp-hz = /bits/ 64 <1900800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x74>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1920000000 {
> + opp-hz = /bits/ 64 <1920000000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x1>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1977600000 {
> + opp-hz = /bits/ 64 <1977600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x30>;
> + clock-latency-ns = <200000>;
> + };
> + opp-1996800000 {
> + opp-hz = /bits/ 64 <1996800000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x1>;
> + clock-latency-ns = <200000>;
> + };
> + opp-2054400000 {
> + opp-hz = /bits/ 64 <2054400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x30>;
> + clock-latency-ns = <200000>;
> + };
> + opp-2073600000 {
> + opp-hz = /bits/ 64 <2073600000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x1>;
> + clock-latency-ns = <200000>;
> + };
> + opp-2150400000 {
> + opp-hz = /bits/ 64 <2150400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x31>;
> + clock-latency-ns = <200000>;
> + };
> + opp-2246400000 {
> + opp-hz = /bits/ 64 <2246400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x10>;
> + clock-latency-ns = <200000>;
> + };
> + opp-2342400000 {
> + opp-hz = /bits/ 64 <2342400000>;
> + opp-microvolt = <1140000 905000 1140000>;
> + opp-supported-hw = <0x10>;
> + clock-latency-ns = <200000>;
> + };
> + };
> +
> +....
> +
> +reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +....
> + smem_mem: smem-mem@86000000 {
> + reg = <0x0 0x86000000 0x0 0x200000>;
> + no-map;
> + };
> +....
> +};
> +
> +smem {
> + compatible = "qcom,smem";
> + memory-region = <&smem_mem>;
> + hwlocks = <&tcsr_mutex 3>;
> +};
> +
> +soc {
> +....
> + qfprom: qfprom@74000 {
> + compatible = "qcom,qfprom";
> + reg = <0x00074000 0x8ff>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ....
> + speedbin_efuse: speedbin@133 {
> + reg = <0x133 0x1>;
> + bits = <5 3>;
> + };
> + };
> +};
> --
> 1.9.1
>

\
 
 \ /
  Last update: 2018-05-16 15:15    [W:0.109 / U:4.444 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site