Messages in this thread Patch in this message | | | From | Michel Pollet <> | Subject | [PATCH v2 3/3] ARM: dts: Renesas RZ/N1D SMP enable method | Date | Tue, 17 Apr 2018 13:48:02 +0100 |
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Add a special enable method for the second CA7 of the Renesas RZ/N1D (R9A06G032), as well as the default value for the "cpu-release-addr" property.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com> --- arch/arm/boot/dts/r9a06g032.dtsi | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 23c56d7..170376d 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -33,6 +33,8 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <1>; + enable-method = "renesas,r9a06g032-smp"; + cpu-release-addr = <0x4000c204>; }; }; -- 2.7.4
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