Messages in this thread Patch in this message | | | From | Jae Hyun Yoo <> | Subject | [PATCH v3 05/10] ARM: dts: aspeed: peci: Add PECI node | Date | Tue, 10 Apr 2018 11:32:07 -0700 |
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This commit adds PECI bus/adapter node of AST24xx/AST25xx into aspeed-g4 and aspeed-g5.
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> Reviewed-by: Haiyue Wang <haiyue.wang@linux.intel.com> Reviewed-by: James Feist <james.feist@linux.intel.com> Reviewed-by: Vernon Mauery <vernon.mauery@linux.intel.com> Cc: Alan Cox <alan@linux.intel.com> Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Andy Shevchenko <andriy.shevchenko@intel.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Fengguang Wu <fengguang.wu@intel.com> Cc: Greg KH <gregkh@linuxfoundation.org> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Jason M Biils <jason.m.bills@linux.intel.com> Cc: Jean Delvare <jdelvare@suse.com> Cc: Joel Stanley <joel@jms.id.au> Cc: Julia Cartwright <juliac@eso.teric.us> Cc: Miguel Ojeda <miguel.ojeda.sandonis@gmail.com> Cc: Milton Miller II <miltonm@us.ibm.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Stef van Os <stef.van.os@prodrive-technologies.com> Cc: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> --- arch/arm/boot/dts/aspeed-g4.dtsi | 25 +++++++++++++++++++++++++ arch/arm/boot/dts/aspeed-g5.dtsi | 25 +++++++++++++++++++++++++ 2 files changed, 50 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 518d2bc7c7fc..f7992eee4d1f 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -29,6 +29,7 @@ serial3 = &uart4; serial4 = &uart5; serial5 = &vuart; + peci0 = &peci0; }; cpus { @@ -270,6 +271,13 @@ }; }; + peci: peci@1e78b000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e78b000 0x60>; + }; + uart2: serial@1e78d000 { compatible = "ns16550a"; reg = <0x1e78d000 0x20>; @@ -313,6 +321,23 @@ }; }; +&peci { + peci0: peci-bus@0 { + compatible = "aspeed,ast2400-peci"; + reg = <0x0 0x60>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <15>; + clocks = <&syscon ASPEED_CLK_GATE_REFCLK>; + clock-frequency = <24000000>; + msg-timing-nego = <1>; + addr-timing-nego = <1>; + rd-sampling-point = <8>; + cmd-timeout-ms = <1000>; + status = "disabled"; + }; +}; + &i2c { i2c_ic: interrupt-controller@0 { #interrupt-cells = <1>; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index f9917717dd08..278791dba8a0 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -29,6 +29,7 @@ serial3 = &uart4; serial4 = &uart5; serial5 = &vuart; + peci0 = &peci0; }; cpus { @@ -320,6 +321,13 @@ }; }; + peci: peci@1e78b000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e78b000 0x60>; + }; + uart2: serial@1e78d000 { compatible = "ns16550a"; reg = <0x1e78d000 0x20>; @@ -363,6 +371,23 @@ }; }; +&peci { + peci0: peci-bus@0 { + compatible = "aspeed,ast2500-peci"; + reg = <0x0 0x60>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <15>; + clocks = <&syscon ASPEED_CLK_GATE_REFCLK>; + clock-frequency = <24000000>; + msg-timing-nego = <1>; + addr-timing-nego = <1>; + rd-sampling-point = <8>; + cmd-timeout-ms = <1000>; + status = "disabled"; + }; +}; + &i2c { i2c_ic: interrupt-controller@0 { #interrupt-cells = <1>; -- 2.16.2
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