lkml.org 
[lkml]   [2018]   [Apr]   [10]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Date
SubjectRe: [PATCH v1 0/1] arm: npcm: enable L2 cache in NPCM7xx architecture
On Sun, Apr 8, 2018 at 4:03 PM, Tomer Maimon <tmaimon77@gmail.com> wrote:
> This patch Enable ARM L2 cache module in Nuvoton NPCM7xx BMC
> by adding L2 cache parameters into NPCM7xx DT machine start structure.
>
> At patch V7 arm: npcm: add basic support for Nuvoton BMCs we got comments
> regarding the flags use in L2 cache module.
> - https://www.spinics.net/lists/arm-kernel/msg613212.html
>
> After checking again the L2 cache use in the NPCM7xx,
> the only L2 cache flag we need to set is L2C_AUX_CTRL_SHARED_OVERRIDE
> and it is done in the device tree:
> https://patchwork.kernel.org/patch/10063497/
>
> L2 cache flag mask allowed all the flag option.

I've applied the patch to my fixes branch now, but took your description above
instead of the two-line text that you had in the patch itself. I liked
the longer
text much better.

Arnd

\
 
 \ /
  Last update: 2018-04-10 16:42    [W:1.184 / U:0.072 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site