Messages in this thread | | | Date | Mon, 05 Mar 2018 14:02:12 -0800 | From | Saravana Kannan <> | Subject | Re: [PATCH v2] perf/core: Add support for PMUs that can be read from more than 1 CPU |
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On 03/05/2018 04:21 AM, Mark Rutland wrote: > On Mon, Mar 05, 2018 at 12:17:02PM +0000, Mark Rutland wrote: >> On Fri, Mar 02, 2018 at 05:14:53PM -0800, Saravana Kannan wrote: > >>> @@ -629,6 +629,7 @@ struct perf_event { >>> >>> int oncpu; >>> int cpu; >>> + cpumask_t readable_on_cpus; >> >> For most PMUs, this will be emptry, and it's potentially *very* large >> (e.g. on systems where NR_CPUS is 4096). Please use a poitner to a mask, >> as I suggested in [1], e.g. > >> [1] https://lkml.kernel.org/r/20171128124534.3jvuala525wvn64r@wfg-t540p.sh.intel.com > > Whoops, that should've been: > > [1] https://lkml.kernel.org/r/20180225143802.denbkubqjg2dc7af@salmiak >
I didn't notice you mentioned the use of pointers, but I was planning on doing that anyway. But then I realize people will complain about cacheline bouncing across 4096 CPUs if I use a cpu mask pointer.
Thanks, Saravana
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