Messages in this thread | | | From | Alexander Duyck <> | Date | Fri, 23 Mar 2018 11:31:34 -0700 | Subject | Re: [Intel-wired-lan] [PATCH v6 7/7] ixgbevf: eliminate duplicate barriers on weakly-ordered archs |
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On Fri, Mar 23, 2018 at 11:27 AM, Sinan Kaya <okaya@codeaurora.org> wrote: > On 3/23/2018 2:25 PM, Alexander Duyck wrote: >>> + /* We need this if more than one processor can write to our tail >>> + * at a time, it synchronizes IO on IA64/Altix systems >>> + */ >>> + mmiowb(); >>> } >> The mmiowb shouldn't be needed for Rx. Only one CPU will be running >> NAPI for the queue and we will synchronize this with a full writel >> anyway when we re-enable the interrupts. >> > > OK. I can fix this on the next version. I did a blanket search and replace for > my writel_relaxed() changes as I don't know the code well enough. > > Please point me to the redundant ones.
So from what I can tell only this file and i40e needed any additional mmiowb calls added. The rest are not needed.
- Alex
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