Messages in this thread | | | Date | Thu, 22 Mar 2018 12:46:44 -0600 | From | Jason Gunthorpe <> | Subject | Re: [PATCH v4 4/6] infiniband: cxgb4: Eliminate duplicate barriers on weakly-ordered archs |
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On Thu, Mar 22, 2018 at 10:28:13AM -0400, Sinan Kaya wrote: > On 03/22/2018 08:48 AM, [1]okaya@codeaurora.org wrote: > > Jason, > Can you remove the writeq change if it is too late for me to fix? > This is an infrastructural issue on xtensa arch. > Probably, it won't get fixed today.
I was able to drop the patch, please resend.
> AFAIS, even writeq won't compile on this arch. I started questioning > this build test.
> I found out that the solution is this: > #include <linux/io-64-nonatomic-hi-lo.h>
Yuk, what an ugly API..
> [2]https://patchwork.ozlabs.org/patch/511801/ > I did a compile test with this change on xtensa and it passed. I'll > repost with the added diff. > +++ b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h > @@ -46,7 +46,7 @@ > #include <linux/timer.h> > #include <linux/io.h> > #include <linux/workqueue.h> > - > +#include <linux/io-64-nonatomic-hi-lo.h>
I think this is the wrong one. I would expect all PCI-E devices should use lo-hi, eg writes are done in address increasing order on the bus.
This is what the PCI-E spec would require if a write were to be fragmented so I would expect devices to handle it properly.
Steve? Any idea of specific things for this HW?
Jason
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