lkml.org 
[lkml]   [2018]   [Mar]   [20]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    From
    SubjectRe: [PATCH v8 19/42] clk: davinci: cfgchip: Add TI DA8XX USB PHY clocks
    Date
    Quoting David Lechner (2018-03-15 19:52:35)
    > This adds a new driver for the USB PHY clocks in the CFGCHIP2 syscon
    > register on TI DA8XX-type SoCs.
    >
    > The USB0 (USB 2.0) PHY clock is an interesting case because it calls
    > clk_enable() in a reentrant way. The USB 2.0 PSC only has to be enabled
    > temporarily while we are locking the PLL, which takes place during the
    > clk_enable() callback.
    >
    > Signed-off-by: David Lechner <david@lechnology.com>
    > ---

    Applied to clk-next

    \
     
     \ /
      Last update: 2018-03-20 18:05    [W:3.145 / U:0.852 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site