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Subject[PATCH v6 0/2] irqchip: qcom: add support for PDC interrupt controller
Date
Changes since v5:
- Fixed comment style of SPDX

Changes since v4:
- Code clean up as suggested by Marc

On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC is in a
power domain that can be powered off when not needed. Interrupts that need to
be sensed even when the GIC is powered off, are routed through an interrupt
controller in an always-on domain called the Power Domain Controller a.k.a PDC.
This series adds support for the PDC's interrupt controller.

Please consider reviewing these patches.

RFC v1: https://patchwork.kernel.org/patch/10180857/
RFC v2: https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1600634.html
v3: https://lkml.org/lkml/2018/2/6/595
v4: https://www.spinics.net/lists/linux-arm-msm/msg32906.html

Lina Iyer (2):
drivers: irqchip: pdc: Add PDC interrupt controller for QCOM SoCs
dt-bindings/interrupt-controller: pdc: descibe PDC device binding

.../bindings/interrupt-controller/qcom,pdc.txt | 78 +++++
drivers/irqchip/Kconfig | 9 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/qcom-pdc.c | 314 +++++++++++++++++++++
4 files changed, 402 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt
create mode 100644 drivers/irqchip/qcom-pdc.c

--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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