lkml.org 
[lkml]   [2018]   [Feb]   [7]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Date
SubjectRe: [PATCH] drm/amd/powerplay: Fix enum mismatch
On Wed, Feb 7, 2018 at 10:58 AM, Matthias Kaehlcke <mka@chromium.org> wrote:
> In several locations the driver uses AMD_CG_STATE_UNGATE (type enum
> amd_clockgating_state) instead of AMD_PG_STATE_UNGATE (type enum
> amd_powergating_stat) and vice versa. Both constants have the same
> value, so this doesn't cause any problems, but we still want to pass
> the correct type.
>
> Fixing the mismatch resolves multiple warnings like this when building
> with clang:
>
> drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_clockpowergating.c:169:7:
> error: implicit conversion from enumeration type 'enum
> amd_powergating_state' to different enumeration type 'enum
> amd_clockgating_state' [-Werror,-Wenum-conversion]
> AMD_PG_STATE_UNGATE);
>
> Signed-off-by: Matthias Kaehlcke <mka@chromium.org>

Reviewed-by: Guenter Roeck <groeck@chromium.org>

> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c | 8 ++++----
> drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c | 2 +-
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
> index 44de0874629f..416abebb8b86 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
> @@ -166,10 +166,10 @@ void cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
> cz_dpm_powerup_uvd(hwmgr);
> cgs_set_clockgating_state(hwmgr->device,
> AMD_IP_BLOCK_TYPE_UVD,
> - AMD_PG_STATE_UNGATE);
> + AMD_CG_STATE_UNGATE);
> cgs_set_powergating_state(hwmgr->device,
> AMD_IP_BLOCK_TYPE_UVD,
> - AMD_CG_STATE_UNGATE);
> + AMD_PG_STATE_UNGATE);
> cz_dpm_update_uvd_dpm(hwmgr, false);
> }
>
> @@ -197,11 +197,11 @@ void cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
> cgs_set_clockgating_state(
> hwmgr->device,
> AMD_IP_BLOCK_TYPE_VCE,
> - AMD_PG_STATE_UNGATE);
> + AMD_CG_STATE_UNGATE);
> cgs_set_powergating_state(
> hwmgr->device,
> AMD_IP_BLOCK_TYPE_VCE,
> - AMD_CG_STATE_UNGATE);
> + AMD_PG_STATE_UNGATE);
> cz_dpm_update_vce_dpm(hwmgr);
> cz_enable_disable_vce_dpm(hwmgr, true);
> }
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
> index 69a0678ace98..402aa9cb1f78 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
> @@ -162,7 +162,7 @@ void smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
> AMD_CG_STATE_UNGATE);
> cgs_set_powergating_state(hwmgr->device,
> AMD_IP_BLOCK_TYPE_UVD,
> - AMD_CG_STATE_UNGATE);
> + AMD_PG_STATE_UNGATE);
> smu7_update_uvd_dpm(hwmgr, false);
> }
>
> --
> 2.16.0.rc1.238.g530d649a79-goog
>

\
 
 \ /
  Last update: 2018-02-07 20:02    [W:0.032 / U:0.488 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site