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    Subject[PATCHv2 3/5] x86/cpufeatures: Add Intel PCONFIG cpufeature
    Date
    CPUID.0x7.0x0:EDX[18] indicates whether Intel CPU support PCONFIG instruction.

    Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
    ---
    arch/x86/include/asm/cpufeatures.h | 1 +
    1 file changed, 1 insertion(+)

    diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
    index d3702d9ac012..b9b46b593938 100644
    --- a/arch/x86/include/asm/cpufeatures.h
    +++ b/arch/x86/include/asm/cpufeatures.h
    @@ -328,6 +328,7 @@
    /* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */
    #define X86_FEATURE_AVX512_4VNNIW (18*32+ 2) /* AVX-512 Neural Network Instructions */
    #define X86_FEATURE_AVX512_4FMAPS (18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */
    +#define X86_FEATURE_PCONFIG (18*32+18) /* Intel PCONFIG */
    #define X86_FEATURE_SPEC_CTRL (18*32+26) /* "" Speculation Control (IBRS + IBPB) */
    #define X86_FEATURE_INTEL_STIBP (18*32+27) /* "" Single Thread Indirect Branch Predictors */
    #define X86_FEATURE_ARCH_CAPABILITIES (18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
    --
    2.15.1
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