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    Subject[tip:ras/core] x86/mce/AMD: Collect error info even if valid bits are not set
    Commit-ID:  4b1e84276a6172980c5bf39aa091ba13e90d6dad
    Gitweb: https://git.kernel.org/tip/4b1e84276a6172980c5bf39aa091ba13e90d6dad
    Author: Borislav Petkov <bp@suse.de>
    AuthorDate: Wed, 21 Feb 2018 11:18:56 +0100
    Committer: Ingo Molnar <mingo@kernel.org>
    CommitDate: Wed, 21 Feb 2018 17:00:54 +0100

    x86/mce/AMD: Collect error info even if valid bits are not set

    The MCA banks log error info into MCA_ADDR, MCA_MISC0, and MCA_SYND even
    if the corresponding valid bits are not set:

    "Error handlers should save the values in MCA_ADDR, MCA_MISC0,
    and MCA_SYND even if MCA_STATUS[AddrV], MCA_STATUS[MiscV], and
    MCA_STATUS[SyndV] are zero."

    Do so by setting those bits so that code down the MCE processing path
    doesn't need to be changed.

    Signed-off-by: Borislav Petkov <bp@suse.de>
    Cc: Borislav Petkov <bp@alien8.de>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: Tony Luck <tony.luck@intel.com>
    Cc: linux-edac <linux-edac@vger.kernel.org>
    Link: http://lkml.kernel.org/r/20180221101900.10326-5-bp@alien8.de
    Signed-off-by: Ingo Molnar <mingo@kernel.org>
    ---
    arch/x86/kernel/cpu/mcheck/mce.c | 14 ++++++++++++++
    1 file changed, 14 insertions(+)

    diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
    index d7dff23..3c9a25b 100644
    --- a/arch/x86/kernel/cpu/mcheck/mce.c
    +++ b/arch/x86/kernel/cpu/mcheck/mce.c
    @@ -441,6 +441,20 @@ static inline void mce_gather_info(struct mce *m, struct pt_regs *regs)
    if (mca_cfg.rip_msr)
    m->ip = mce_rdmsrl(mca_cfg.rip_msr);
    }
    +
    + /*
    + * Error handlers should save the values in MCA_ADDR, MCA_MISC0, and
    + * MCA_SYND even if MCA_STATUS[AddrV], MCA_STATUS[MiscV], and
    + * MCA_STATUS[SyndV] are zero.
    + */
    + if (m->cpuvendor == X86_VENDOR_AMD) {
    + u64 status = MCI_STATUS_ADDRV | MCI_STATUS_MISCV;
    +
    + if (mce_flags.smca)
    + status |= MCI_STATUS_SYNDV;
    +
    + m->status |= status;
    + }
    }

    int mce_available(struct cpuinfo_x86 *c)
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