Messages in this thread | | | Subject | Re: [PATCH 0/3] Use global pages with PTI | From | Dave Hansen <> | Date | Thu, 15 Feb 2018 10:13:05 -0800 |
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On 02/15/2018 09:47 AM, Linus Torvalds wrote: > On Thu, Feb 15, 2018 at 5:20 AM, Dave Hansen > <dave.hansen@linux.intel.com> wrote: >> >> During the switch over to PTI, we seem to have lost our ability to have >> GLOBAL mappings. > > Oops. Odd, I have this distinct memory of somebody even _testing_ the > global bit performance when I pointed out that we shouldn't just make > the bit go away entirely. > > [ goes back and looks at archives ] > > Oh, that was in fact you who did that performance test. ... > Did you perhaps re-run any benchmark numbers just to verify? Because > it's always good to back up patches that should improve performance > with actual numbers..
Nope, haven't done it yet, but I will.
I wanted to double-check that there was not a reason for doing the global disabling other than the K8 TLB mismatch issues that Thomas fixed a few weeks ago:
> commit 52994c256df36fda9a715697431cba9daecb6b11 > Author: Thomas Gleixner <tglx@linutronix.de> > Date: Wed Jan 3 15:57:59 2018 +0100 > > x86/pti: Make sure the user/kernel PTEs match > > Meelis reported that his K8 Athlon64 emits MCE warnings when PTI is > enabled: > > [Hardware Error]: Error Addr: 0x0000ffff81e000e0 > [Hardware Error]: MC1 Error: L1 TLB multimatch. > [Hardware Error]: cache level: L1, tx: INSN
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