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SubjectRe: [PATCH v11 03/10] sparc64: Add support for ADI register fields, ASIs and traps
> >  #define _PAGE_E_4V	  _AC(0x0000000000000800,UL) /* side-Effect          */
> > #define _PAGE_CP_4V _AC(0x0000000000000400,UL) /* Cacheable in P-Cache */
> > #define _PAGE_CV_4V _AC(0x0000000000000200,UL) /* Cacheable in V-Cache */
> > +/* Bit 9 is used to enable MCD corruption detection instead on M7 */
> > +#define _PAGE_MCD_4V _AC(0x0000000000000200,UL) /* Memory Corruption */
>
> trivia:
>
> There are some whitespace alignment issues here
Looks like you are fouled by the use of tabs.
When you apply the patch it is fine.

>
> > diff --git a/arch/sparc/include/asm/ttable.h b/arch/sparc/include/asm/ttable.h
> []
> > @@ -219,6 +219,16 @@
> > nop; \
> > nop;
> >
> > +#define SUN4V_MCD_PRECISE \
> > + ldxa [%g0] ASI_SCRATCHPAD, %g2; \
> > + ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \
> > + ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \
> > + ba,pt %xcc, etrap; \
> > + rd %pc, %g7; \
> > + ba,pt %xcc, sun4v_mcd_detect_precise; \
> > + nop; \
> > + nop;
>
> and here and elsewhere.
>
> It would be nicer to make all these use
> similar indentation.

The patch uses the sparc idiom to indent instructions
in the delay slot after a branch with one space.
So the space before the nop is mandatory and not a bug.

Sam

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