Messages in this thread | | | Date | Mon, 31 Dec 2018 18:26:54 +0100 | From | Pavel Machek <> | Subject | Re: [PATCH v3] Optimize C3 entry on Centaur CPUs |
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On Thu 2018-12-27 16:41:50, David Wang wrote: > For new Centaur CPUs the ucode will take care of the preservation of cache coherence > between CPU cores in C-states regardless of how deep the C-states are. So, it is not > necessary to flush the caches in software befor entering C3. And this useless operation > will cause performance drop for the cores which share some caches with the idling core. > > Signed-off-by: David Wang <davidwang@zhaoxin.com> > Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Pavel Machek <pavel@ucw.cz>
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