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    Subject[PATCH AUTOSEL 4.19 68/97] net: mvpp2: 10G modes aren't supported on all ports
    Date
    From: Antoine Tenart <antoine.tenart@bootlin.com>

    [ Upstream commit 006791772084383de779ef29f2e06f3a6e111e7d ]

    The mvpp2_phylink_validate() function sets all modes that are
    supported by a given PPv2 port. A recent change made all ports to
    advertise they support 10G modes in certain cases. This is not true,
    as only the port #0 can do so. This patch fixes it.

    Fixes: 01b3fd5ac97c ("net: mvpp2: fix detection of 10G SFP modules")
    Cc: Baruch Siach <baruch@tkos.co.il>
    Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 14 ++++++++------
    1 file changed, 8 insertions(+), 6 deletions(-)

    diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
    index 6320e080b831..d5bc90476b4f 100644
    --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
    +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
    @@ -4292,12 +4292,14 @@ static void mvpp2_phylink_validate(struct net_device *dev,
    case PHY_INTERFACE_MODE_10GKR:
    case PHY_INTERFACE_MODE_XAUI:
    case PHY_INTERFACE_MODE_NA:
    - phylink_set(mask, 10000baseCR_Full);
    - phylink_set(mask, 10000baseSR_Full);
    - phylink_set(mask, 10000baseLR_Full);
    - phylink_set(mask, 10000baseLRM_Full);
    - phylink_set(mask, 10000baseER_Full);
    - phylink_set(mask, 10000baseKR_Full);
    + if (port->gop_id == 0) {
    + phylink_set(mask, 10000baseCR_Full);
    + phylink_set(mask, 10000baseSR_Full);
    + phylink_set(mask, 10000baseLR_Full);
    + phylink_set(mask, 10000baseLRM_Full);
    + phylink_set(mask, 10000baseER_Full);
    + phylink_set(mask, 10000baseKR_Full);
    + }
    /* Fall-through */
    case PHY_INTERFACE_MODE_RGMII:
    case PHY_INTERFACE_MODE_RGMII_ID:
    --
    2.19.1
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