Messages in this thread | | | From | Geert Uytterhoeven <> | Date | Mon, 17 Dec 2018 17:08:11 +0100 | Subject | Re: [PATCH 9/9] arm64: dts: renesas: r8a774c0: Add secondary CA53 CPU core |
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On Fri, Dec 14, 2018 at 10:10 AM Fabrizio Castro <fabrizio.castro@bp.renesas.com> wrote: > Add a device node for the second Cortex-A53 CPU core on the Renesas > RZ/G2E (a.k.a r8a774c0) SoC, and adjust the interrupt delivery masks > for the ARM Generic Interrupt Controller and Architectured Timer. > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
-- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
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