Messages in this thread Patch in this message | | | From | Keith Busch <> | Subject | [PATCHv2 10/12] Documentation/ABI: Add node cache attributes | Date | Mon, 10 Dec 2018 18:03:08 -0700 |
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Add the attributes for the system memory side caches.
Signed-off-by: Keith Busch <keith.busch@intel.com> --- Documentation/ABI/stable/sysfs-devices-node | 34 +++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
diff --git a/Documentation/ABI/stable/sysfs-devices-node b/Documentation/ABI/stable/sysfs-devices-node index 6cdb0643f9fd..63a757b8a29e 100644 --- a/Documentation/ABI/stable/sysfs-devices-node +++ b/Documentation/ABI/stable/sysfs-devices-node @@ -151,3 +151,37 @@ Contact: Keith Busch <keith.busch@intel.com> Description: Write latency in nanosecondss available to memory initiators found in primary_cpu_nodemask. + +What: /sys/devices/system/node/nodeX/side_cache/indexY/associativity +Date: December 2018 +Contact: Keith Busch <keith.busch@intel.com> +Description: + The caches associativity: 0 for direct mapped, non-zero if + indexed. + +What: /sys/devices/system/node/nodeX/side_cache/indexY/level +Date: December 2018 +Contact: Keith Busch <keith.busch@intel.com> +Description: + This cache's level in the memory hierarchy. Matches 'Y' in the + directory name. + +What: /sys/devices/system/node/nodeX/side_cache/indexY/line_size +Date: December 2018 +Contact: Keith Busch <keith.busch@intel.com> +Description: + The number of bytes accessed from the next cache level on a + cache miss. + +What: /sys/devices/system/node/nodeX/side_cache/indexY/size +Date: December 2018 +Contact: Keith Busch <keith.busch@intel.com> +Description: + The size of this memory side cache in bytes. + +What: /sys/devices/system/node/nodeX/side_cache/indexY/write_policy +Date: December 2018 +Contact: Keith Busch <keith.busch@intel.com> +Description: + The cache write policy: 0 for write-back, 1 for write-through, + 2 for other or unknown. -- 2.14.4
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