Messages in this thread | | | Date | Sun, 7 Jan 2018 13:03:03 +0100 | From | Borislav Petkov <> | Subject | Re: [PATCH v2 2/8] x86/enter: MACROS to set/clear IBRS |
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On Fri, Jan 05, 2018 at 06:12:17PM -0800, Tim Chen wrote:
> Subject: Re: [PATCH v2 2/8] x86/enter: MACROS to set/clear IBRS
Your subject needs to have a verb and not scream:
Subject: [PATCH v2 2/8] x86/entry: Add macros to set/clear IBRS
> Create macros to control IBRS. Use these macros to enable IBRS on kernel entry > paths and disable IBRS on kernel exit paths. > > The registers rax, rcx and rdx are touched when controlling IBRS > so they need to be saved when they can't be clobbered. > > Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com> > --- > arch/x86/entry/calling.h | 74 ++++++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 74 insertions(+) > > diff --git a/arch/x86/entry/calling.h b/arch/x86/entry/calling.h > index 45a63e0..09c870d 100644 > --- a/arch/x86/entry/calling.h > +++ b/arch/x86/entry/calling.h > @@ -6,6 +6,8 @@ > #include <asm/percpu.h> > #include <asm/asm-offsets.h> > #include <asm/processor-flags.h> > +#include <asm/msr-index.h> > +#include <asm/cpufeatures.h> > > /* > > @@ -347,3 +349,75 @@ For 32-bit we have the following conventions - kernel is built with > .Lafter_call_\@: > #endif > .endm > + > +/* > + * IBRS related macros > + */ > +.macro PUSH_MSR_REGS > + pushq %rax > + pushq %rcx > + pushq %rdx > +.endm > + > +.macro POP_MSR_REGS > + popq %rdx > + popq %rcx > + popq %rax > +.endm > + > +.macro WRMSR_ASM msr_nr:req eax_val:req
WRMSR as a name is good enough.
Also, you need edx_val:req too in case we decide to reuse that macro for something else later. Which I'm pretty sure we will, once it is out there.
> + movl \msr_nr, %ecx > + movl $0, %edx
... and then
movl \edx_val, %edx
> + movl \eax_val, %eax > +.endm > + > +.macro ENABLE_IBRS > + ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_SPEC_CTRL > + PUSH_MSR_REGS > + WRMSR_ASM $MSR_IA32_SPEC_CTRL, $SPEC_CTRL_FEATURE_ENABLE_IBRS
This is overwriting the previous contents of the MSR. You need to read it and OR-in its bits [63:2] with SPEC_CTRL_FEATURE_ENABLE_IBRS and clear bit 0.
Unless the rest of this MSR is not going to be used for anything else. Then you're fine.
-- Regards/Gruss, Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
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