lkml.org 
[lkml]   [2018]   [Jan]   [31]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 04/19] clk: meson: remove obsolete comments
    Date
    Over time things changes in CCF and issues have been fixed in meson
    controllers.

    Now, clk81 is decently modeled by read-only PLLs, a mux, a divider
    and a gate. We can remove the FIXME comments related to clk81.
    Also remove the comment about devm_clk_hw_register, as there is
    apparently nothing wrong with it.

    Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
    ---
    drivers/clk/meson/axg.c | 5 -----
    drivers/clk/meson/gxbb.c | 6 ------
    drivers/clk/meson/meson8b.c | 1 -
    3 files changed, 12 deletions(-)

    diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
    index 81565b025b70..f84927e76f88 100644
    --- a/drivers/clk/meson/axg.c
    +++ b/drivers/clk/meson/axg.c
    @@ -411,11 +411,6 @@ static struct meson_clk_mpll axg_mpll3 = {
    },
    };

    -/*
    - * FIXME The legacy composite clocks (e.g. clk81) are both PLL post-dividers
    - * and should be modeled with their respective PLLs via the forthcoming
    - * coordinated clock rates feature
    - */
    static u32 mux_table_clk81[] = { 0, 2, 3, 4, 5, 6, 7 };
    static const char * const clk81_parent_names[] = {
    "xtal", "fclk_div7", "mpll1", "mpll2", "fclk_div4",
    diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
    index e6adab49c0ba..6609024eee00 100644
    --- a/drivers/clk/meson/gxbb.c
    +++ b/drivers/clk/meson/gxbb.c
    @@ -575,12 +575,6 @@ static struct meson_clk_mpll gxbb_mpll2 = {
    },
    };

    -/*
    - * FIXME The legacy composite clocks (e.g. clk81) are both PLL post-dividers
    - * and should be modeled with their respective PLLs via the forthcoming
    - * coordinated clock rates feature
    - */
    -
    static u32 mux_table_clk81[] = { 0, 2, 3, 4, 5, 6, 7 };
    static const char * const clk81_parent_names[] = {
    "xtal", "fclk_div7", "mpll1", "mpll2", "fclk_div4",
    diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
    index ffadad27375e..db017c29a84c 100644
    --- a/drivers/clk/meson/meson8b.c
    +++ b/drivers/clk/meson/meson8b.c
    @@ -849,7 +849,6 @@ static int meson8b_clkc_probe(struct platform_device *pdev)
    if (!meson8b_hw_onecell_data.hws[i])
    continue;

    - /* FIXME convert to devm_clk_register */
    ret = devm_clk_hw_register(dev, meson8b_hw_onecell_data.hws[i]);
    if (ret)
    return ret;
    --
    2.14.3
    \
     
     \ /
      Last update: 2018-01-31 19:15    [W:4.135 / U:0.108 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site