Messages in this thread Patch in this message | | | From | Steffen Trumtrar <> | Subject | [PATCH] ARM: dts: socfpga: add i2c reset signals | Date | Tue, 16 Jan 2018 10:29:35 +0100 |
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From: Tim Sander <tim.sander@hbm.com>
Add the reset signals for the i2c controllers on Cyclone5-based SoCFPGA boards to the dtsi.
Signed-off-by: Tim Sander <tim.sander@hbm.com> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> --- arch/arm/boot/dts/socfpga.dtsi | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 7e24dc8e82d4..c42ca7022e8c 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -651,6 +651,7 @@ #size-cells = <0>; compatible = "snps,designware-i2c"; reg = <0xffc04000 0x1000>; + resets = <&rst I2C0_RESET>; clocks = <&l4_sp_clk>; interrupts = <0 158 0x4>; status = "disabled"; @@ -661,6 +662,7 @@ #size-cells = <0>; compatible = "snps,designware-i2c"; reg = <0xffc05000 0x1000>; + resets = <&rst I2C1_RESET>; clocks = <&l4_sp_clk>; interrupts = <0 159 0x4>; status = "disabled"; @@ -671,6 +673,7 @@ #size-cells = <0>; compatible = "snps,designware-i2c"; reg = <0xffc06000 0x1000>; + resets = <&rst I2C2_RESET>; clocks = <&l4_sp_clk>; interrupts = <0 160 0x4>; status = "disabled"; @@ -681,6 +684,7 @@ #size-cells = <0>; compatible = "snps,designware-i2c"; reg = <0xffc07000 0x1000>; + resets = <&rst I2C3_RESET>; clocks = <&l4_sp_clk>; interrupts = <0 161 0x4>; status = "disabled"; -- 2.11.0
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