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SubjectRe: [PATCH] mmc: tegra: Mark 64 bit dma broken on Tegra186
On Fri, Sep 08, 2017 at 12:48:33PM -0700, Krishna Reddy wrote:
> SDHCI controllers on Tegra186 support 40 bit addressing.
> IOVA addresses are 48-bit wide on Tegra186.
> SDHCI host common code sets dma mask as either 32-bit or 64-bit.
> To avoid access issues when SMMU is enabled, disable 64-bit dma.
>
> Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
> ---
> drivers/mmc/host/sdhci-tegra.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)

This matches a local commit:

Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
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