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Subject[PATCH 0/6] Boot-time switching between 4- and 5-level paging for 4.15, Part 1
Date
The first bunch of patches that prepare kernel to boot-time switching
between paging modes.

Please review and consider applying.

Andrey Ryabinin (1):
x86/kasan: Use the same shadow offset for 4- and 5-level paging

Kirill A. Shutemov (5):
mm/sparsemem: Allocate mem_section at runtime for SPARSEMEM_EXTREME
mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS
x86/xen: Provide pre-built page tables only for XEN_PV and XEN_PVH
x86/xen: Drop 5-level paging support code from XEN_PV code
x86/boot/compressed/64: Detect and handle 5-level paging at boot-time

Documentation/x86/x86_64/mm.txt | 2 +-
arch/x86/Kconfig | 1 -
arch/x86/boot/compressed/head_64.S | 26 ++++-
arch/x86/include/asm/pgtable-3level_types.h | 1 +
arch/x86/include/asm/pgtable_64_types.h | 2 +
arch/x86/kernel/Makefile | 3 +-
arch/x86/kernel/head_64.S | 11 +-
arch/x86/mm/kasan_init_64.c | 101 ++++++++++++++----
arch/x86/xen/mmu_pv.c | 159 +++++++++++-----------------
include/linux/mmzone.h | 6 +-
mm/page_alloc.c | 10 ++
mm/sparse.c | 17 +--
mm/zsmalloc.c | 13 +--
13 files changed, 210 insertions(+), 142 deletions(-)

--
2.14.2

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