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Subject[PATCH 6/6] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time
Date
This patch prepare decompression code to boot-time switching between 4-
and 5-level paging.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
arch/x86/boot/compressed/head_64.S | 26 +++++++++++++++++++++++++-
1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
index b4a5d284391c..cefe4958fda9 100644
--- a/arch/x86/boot/compressed/head_64.S
+++ b/arch/x86/boot/compressed/head_64.S
@@ -288,7 +288,29 @@ ENTRY(startup_64)
leaq boot_stack_end(%rbx), %rsp

#ifdef CONFIG_X86_5LEVEL
- /* Check if 5-level paging has already enabled */
+ /* Preserve RBX across CPUID */
+ movq %rbx, %r8
+
+ /* Check if leaf 7 is supported */
+ xorl %eax, %eax
+ cpuid
+ cmpl $7, %eax
+ jb lvl5
+
+ /*
+ * Check if LA57 is supported.
+ * The feature is enumerated with CPUID.(EAX=07H, ECX=0):ECX[bit 16]
+ */
+ movl $7, %eax
+ xorl %ecx, %ecx
+ cpuid
+ andl $(1 << 16), %ecx
+ jz lvl5
+
+ /* Restore RBX */
+ movq %r8, %rbx
+
+ /* Check if 5-level paging has already been enabled */
movq %cr4, %rax
testl $X86_CR4_LA57, %eax
jnz lvl5
@@ -327,6 +349,8 @@ ENTRY(startup_64)
pushq %rax
lretq
lvl5:
+ /* Restore RBX */
+ movq %r8, %rbx
#endif

/* Zero EFLAGS */
--
2.14.2
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