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    Subject[PATCH 4/4] ARM: DTS: imx: ventana: add TDA19971 HDMI Receiver to GW54xx
    Date
    The GW54xx has a front-panel microHDMI connector routed to a TDA19971
    which is connected the the IPU CSI when using IMX6Q.

    Signed-off-by: Tim Harvey <tharvey@gateworks.com>
    ---
    arch/arm/boot/dts/imx6q-gw54xx.dts | 85 ++++++++++++++++++++++++++++++++++++++
    1 file changed, 85 insertions(+)

    diff --git a/arch/arm/boot/dts/imx6q-gw54xx.dts b/arch/arm/boot/dts/imx6q-gw54xx.dts
    index 56e5b50..efb7dd3 100644
    --- a/arch/arm/boot/dts/imx6q-gw54xx.dts
    +++ b/arch/arm/boot/dts/imx6q-gw54xx.dts
    @@ -12,6 +12,7 @@
    /dts-v1/;
    #include "imx6q.dtsi"
    #include "imx6qdl-gw54xx.dtsi"
    +#include <dt-bindings/media/tda1997x.h>

    / {
    model = "Gateworks Ventana i.MX6 Dual/Quad GW54XX";
    @@ -35,6 +36,60 @@
    };
    };
    };
    +
    + tda1997x: tda1997x@48 {
    + compatible = "nxp,tda19971";
    + pinctrl-names = "default";
    + pinctrl-0 = <&pinctrl_tda1997x>;
    + reg = <0x48>;
    + interrupt-parent = <&gpio1>;
    + interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
    + DOVDD-supply = <&reg_3p3v>;
    + AVDD-supply = <&sw4_reg>;
    + DVDD-supply = <&sw4_reg>;
    + audio-port = < TDA1997X_I2S16
    + TDA1997X_LAYOUT0
    + TDA1997X_ACLK_128FS >;
    + /*
    + * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4]
    + * and Y[11:4] across 16bits in the same cycle
    + * which we map to VP[15:08]<->CSI_DATA[19:12]
    + */
    + vidout_portcfg =
    + /*G_Y_11_8<->VP[15:12]<->CSI_DATA[19:16]*/
    + < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >,
    + /*G_Y_7_4<->VP[11:08]<->CSI_DATA[15:12]*/
    + < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >,
    + /*R_CR_CBCR_11_8<->VP[07:04]<->CSI_DATA[11:08]*/
    + < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >,
    + /*R_CR_CBCR_7_4<->VP[03:00]<->CSI_DATA[07:04]*/
    + < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >;
    + max-pixel-rate = <180>; /* IMX6 CSI max pixel rate 180MP/sec */
    +
    + port {
    + tda1997x_to_ipu1_csi0_mux: endpoint {
    + remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
    + bus-width = <16>;
    + hsync-active = <1>;
    + vsync-active = <1>;
    + data-active = <1>;
    + };
    + };
    + };
    +};
    +
    +&ipu1_csi0_from_ipu1_csi0_mux {
    + bus-width = <16>;
    +};
    +
    +&ipu1_csi0_mux_from_parallel_sensor {
    + remote-endpoint = <&tda1997x_to_ipu1_csi0_mux>;
    + bus-width = <16>;
    +};
    +
    +&ipu1_csi0 {
    + pinctrl-names = "default";
    + pinctrl-0 = <&pinctrl_ipu1_csi0>;
    };

    &ipu2_csi1_from_ipu2_csi1_mux {
    @@ -63,6 +118,30 @@
    >;
    };

    + pinctrl_ipu1_csi0: ipu1_csi0grp {
    + fsl,pins = <
    + MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
    + MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
    + MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
    + MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
    + MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
    + >;
    + };
    +
    pinctrl_ipu2_csi1: ipu2_csi1grp {
    fsl,pins = <
    MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19 0x1b0b0
    @@ -78,4 +157,10 @@
    MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK 0x1b0b0
    >;
    };
    +
    + pinctrl_tda1997x: tda1997xgrp {
    + fsl,pins = <
    + MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
    + >;
    + };
    };
    --
    2.7.4
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