Messages in this thread | | | From | Linus Walleij <> | Date | Thu, 14 Sep 2017 15:59:26 +0200 | Subject | Re: [PATCH 14/16] gpio: Add support for banked GPIO controllers |
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On Fri, Sep 1, 2017 at 8:57 PM, Thierry Reding <thierry.reding@gmail.com> wrote:
> From: Thierry Reding <treding@nvidia.com> > > Some GPIO controllers are subdivided into multiple logical blocks called > banks (or ports). This is often caused by the design assigning separate > resources, such as register regions or interrupts, to each bank, or some > set of banks. > > This commit adds support for describing controllers that have such a > banked design and provides common code for dealing with them. > > Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch makes me really happy.
It pulls in a lot of weirdness to the OF core and creates a coherent way of handling these "banked" GPIO chips.
CC to Tony to make sure he checks that OMAP is ready to use this too.
I would change num_pins to num_lines everywhere in this patch, so if you resend the series, please fix that.
> +void gpio_irq_chip_banked_handler(struct irq_desc *desc)
Maybe we should name this gpio_irq_chip_banked_chained_handler() since it only deals with chained IRQs?
Sooner or later we will have a nested bank too...
Otherwise it looks fine.
Yours, Linus Walleij
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