Messages in this thread Patch in this message | | | From | Abhishek Sahu <> | Subject | [PATCH v3 18/20] dt-bindings: qcom_nandc: IPQ8074 QPIC NAND documentation | Date | Sat, 5 Aug 2017 21:49:56 +0530 |
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Qualcom IPQ8074 SoC uses QPIC NAND controller version 1.5.0 which uses BAM DMA Engine.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> --- Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt index d93b952..8dfa543 100644 --- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt +++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt @@ -6,6 +6,8 @@ Required properties: SoC and it uses ADM DMA * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in IPQ4019 SoC and it uses BAM DMA + * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in + IPQ8074 SoC and it uses BAM DMA - reg: MMIO address range - clocks: must contain core clock and always on clock @@ -97,7 +99,7 @@ nand-controller@1ac00000 { }; nand-controller@79b0000 { - compatible = "qcom,ipq4019-nand"; + compatible = "qcom,ipq4019-nand", "qcom,ipq8074-nand"; reg = <0x79b0000 0x1000>; clocks = <&gcc GCC_QPIC_CLK>, -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
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