Messages in this thread | | | Subject | Re: [PATCH V7 1/3] PCI: limit FLR wait time to 100ms maximum | From | Sinan Kaya <> | Date | Wed, 2 Aug 2017 16:32:26 -0400 |
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On 8/2/2017 4:27 PM, Bjorn Helgaas wrote: > I haven't worked through all the details of what 6.6.2 says, but I > think it uses 100ms in the context of the *minimum* time software must > wait between initiating an FLR and initializing the function
Here is what spec says in 6.6.2
"After an FLR has been initiated by writing a 1b to the Initiate Function Level Reset bit, the Function must complete the FLR within 100 ms."
I interpret this as maximum.
-- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
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