| Date | Wed, 5 Jul 2017 14:25:06 +0200 | From | Peter Zijlstra <> | Subject | Re: [PATCH v4 10/10] x86/mm: Try to preserve old TLB entries using PCID |
| |
On Thu, Jun 29, 2017 at 08:53:22AM -0700, Andy Lutomirski wrote: > +static void choose_new_asid(struct mm_struct *next, u64 next_tlb_gen, > + u16 *new_asid, bool *need_flush) > +{ > + u16 asid; > + > + if (!static_cpu_has(X86_FEATURE_PCID)) { > + *new_asid = 0; > + *need_flush = true; > + return; > + } > + > + for (asid = 0; asid < TLB_NR_DYN_ASIDS; asid++) { > + if (this_cpu_read(cpu_tlbstate.ctxs[asid].ctx_id) != > + next->context.ctx_id) > + continue; > + > + *new_asid = asid; > + *need_flush = (this_cpu_read(cpu_tlbstate.ctxs[asid].tlb_gen) < > + next_tlb_gen); > + return; > + } > + > + /* > + * We don't currently own an ASID slot on this CPU. > + * Allocate a slot. > + */ > + *new_asid = this_cpu_add_return(cpu_tlbstate.next_asid, 1) - 1;
So this basically RR the ASID slots. Have you tried slightly more complex replacement policies like CLOCK ?
> + if (*new_asid >= TLB_NR_DYN_ASIDS) { > + *new_asid = 0; > + this_cpu_write(cpu_tlbstate.next_asid, 1); > + } > + *need_flush = true; > +}
|