Messages in this thread | | | Subject | Re: [PATCH v4 2/2] x86/amd: Fixup cpu_core_id for family17h downcore configuration | From | Suravee Suthikulpanit <> | Date | Tue, 25 Jul 2017 13:02:49 +0700 |
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Boris,
On 7/25/17 12:56, Borislav Petkov wrote: > On Tue, Jul 25, 2017 at 12:51:53PM +0700, Suravee Suthikulpanit wrote: >> Ok. Sure, it doesn't need be contiguous. But at least the cpu_core_id should >> represent an ID that make some sense since it is used in the >> arch/x86/kernel/smpboot.c: match_smt() and some other places. So, if it's >> invalid for the downcore configuration (i.e. duplicated where it should not >> be), we should at least clean this up. > Ah right, we do use it for the SMT siblings. So yes, it should be > correct for them. And I'm pretty sure the numbers we derive from the > initial APIC ID are already good enough for that. >
commit 08b259631b5a1d912af4832847b5642f377d9101 Author: Yazen Ghannam <Yazen.Ghannam@amd.com> Date: Sun Feb 5 11:50:22 2017 +0100
x86/CPU/AMD: Fix Zen SMT topology
After:
a33d331761bc ("x86/CPU/AMD: Fix Bulldozer topology")
our SMT scheduling topology for Fam17h systems is broken, because the ThreadId is included in the ApicId when SMT is enabled.
So, without further decoding cpu_core_id is unique for each thread rather than the same for threads on the same core. This didn't affect systems with SMT disabled. Make cpu_core_id be what it is defined to be.
Actually, this commit change how we derive the cpu_core_id fro family17h to use CPUID_Fn8000001E_EBX instead of from APIC ID for family17h and later.
Thanks, Suravee
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