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    Subject[PATCH 3.18 43/60] MIPS: Fix unaligned PC interpretation in `compute_return_epc
    Date
    3.18-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Maciej W. Rozycki <macro@imgtec.com>

    commit 11a3799dbeb620bf0400b1fda5cc2c6bea55f20a upstream.

    Fix a regression introduced with commit fb6883e5809c ("MIPS: microMIPS:
    Support handling of delay slots.") and defer to `__compute_return_epc'
    if the ISA bit is set in EPC with non-MIPS16, non-microMIPS hardware,
    which will then arrange for a SIGBUS due to an unaligned instruction
    reference. Returning EPC here is never correct as the API defines this
    function's result to be either a negative error code on failure or one
    of 0 and BRANCH_LIKELY_TAKEN on success.

    Fixes: fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.")
    Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
    Cc: James Hogan <james.hogan@imgtec.com>
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/16395/
    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    arch/mips/include/asm/branch.h | 5 +----
    1 file changed, 1 insertion(+), 4 deletions(-)

    --- a/arch/mips/include/asm/branch.h
    +++ b/arch/mips/include/asm/branch.h
    @@ -74,10 +74,7 @@ static inline int compute_return_epc(str
    return __microMIPS_compute_return_epc(regs);
    if (cpu_has_mips16)
    return __MIPS16e_compute_return_epc(regs);
    - return regs->cp0_epc;
    - }
    -
    - if (!delay_slot(regs)) {
    + } else if (!delay_slot(regs)) {
    regs->cp0_epc += 4;
    return 0;
    }

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