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SubjectRe: [patches] [PATCH 1/9] RISC-V: Init and Halt Code
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On Fri, 07 Jul 2017 05:58:55 PDT (-0700), j.neuschaefer@gmx.net wrote:
> On Thu, Jul 06, 2017 at 03:34:39PM -0700, Palmer Dabbelt wrote:
>> On Tue, 04 Jul 2017 14:54:01 PDT (-0700), j.neuschaefer@gmx.net wrote:
> [...]
>> >> +#define DO_ERROR_INFO(name, signo, code, str) \
>> >> +asmlinkage void name(struct pt_regs *regs) \
>> >> +{ \
>> >> + do_trap_error(regs, signo, code, regs->sepc, "Oops - " str); \
>> >> +}
>> >> +
>> >> +DO_ERROR_INFO(do_trap_unknown,
>> >> + SIGILL, ILL_ILLTRP, "unknown exception");
>> >> +DO_ERROR_INFO(do_trap_insn_misaligned,
>> >> + SIGBUS, BUS_ADRALN, "instruction address misaligned");
>> >> +DO_ERROR_INFO(do_trap_insn_fault,
>> >> + SIGBUS, BUS_ADRALN, "instruction access fault");
>> >
>> > For a general instruction access fault, BUS_ADRALN seems wrong. A
>> > variant of SIGSEGV seems more appropriate, IMHO.
>>
>> How does this look?
>>
>> diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
>> index 4c693b5b9980..3ce9ac6e736e 100644
>> --- a/arch/riscv/kernel/traps.c
>> +++ b/arch/riscv/kernel/traps.c
>> @@ -112,7 +112,7 @@ DO_ERROR_INFO(do_trap_unknown,
>> DO_ERROR_INFO(do_trap_insn_misaligned,
>> SIGBUS, BUS_ADRALN, "instruction address misaligned");
>> DO_ERROR_INFO(do_trap_insn_fault,
>> - SIGBUS, BUS_ADRALN, "instruction access fault");
>> + SIGBUS, SEGV_ACCERR, "instruction access fault");
>> DO_ERROR_INFO(do_trap_insn_illegal,
>> SIGILL, ILL_ILLOPC, "illegal instruction");
>> DO_ERROR_INFO(do_trap_load_misaligned,
>
> I'm not familiar with the trap handling infrastructure, but looking at
> include/uapi/asm-generic/siginfo.h, SEGV_ACCERR would alias to
> BUS_ADRERR (both are defined as (__SI_FAULT|2)). So if you use SEGV_*,
> you need to use SIGSEGV, too.
>
> With DO_ERROR_INFO(..., SIGSEGV, SEGV_ACCERR, ...); it looks good to me.

Oh, sorry, I wasn't paying attention. It should be fixed now.

Thanks!

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