Messages in this thread | | | Subject | Re: [PATCH v4 1/3] nvmem: dt: document SNVS LPGPR binding | From | Srinivas Kandagatla <> | Date | Fri, 9 Jun 2017 10:36:38 +0100 |
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On 08/06/17 17:51, Oleksij Rempel wrote: > Documentation bindings for the Low Power General Purpose Register > available on i.MX6 SoCs in the Secure Non-Volatile Storage. > > Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> > --- > .../devicetree/bindings/nvmem/snvs-lpgpr.txt | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > create mode 100644 Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt > > diff --git a/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt b/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt
These look okay, but bindings needs ack from DT maintainers for me to pick it up.
--srini
> new file mode 100644 > index 000000000000..21910fb3159f > --- /dev/null > +++ b/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt > @@ -0,0 +1,19 @@ > +Device tree bindings for Low Power General Purpose Register found in i.MX6Q/D > +Secure Non-Volatile Storage. > + > +This DT node should be represented as a sub-node of a "syscon", > +"simple-mfd" node. > + > +Required properties: > +- compatible: should be: > + "fsl,imx6q-snvs-lpgpr" for Freescale i.MX6Q/D/DL/S > + > +Example: > +snvs: snvs@020cc000 { > + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; > + reg = <0x020cc000 0x4000>; > + > + snvs_lpgpr: snvs-lpgpr { > + compatible = "fsl,imx6q-snvs-lpgpr"; > + }; > +}; >
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