lkml.org 
[lkml]   [2017]   [Jun]   [5]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 4.11 054/115] x86/MCE: Export memory_error()
    Date
    4.11-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Borislav Petkov <bp@suse.de>

    commit 2d1f406139ec20320bf38bcd2461aa8e358084b5 upstream.

    Export the function which checks whether an MCE is a memory error to
    other users so that we can reuse the logic. Drop the boot_cpu_data use,
    while at it, as mce.cpuvendor already has the CPU vendor in there.

    Integrate a piece from a patch from Vishal Verma
    <vishal.l.verma@intel.com> to export it for modules (nfit).

    The main reason we're exporting it is that the nfit handler
    nfit_handle_mce() needs to detect a memory error properly before doing
    its recovery actions.

    Signed-off-by: Borislav Petkov <bp@suse.de>
    Cc: Tony Luck <tony.luck@intel.com>
    Cc: Vishal Verma <vishal.l.verma@intel.com>
    Link: http://lkml.kernel.org/r/20170519093915.15413-2-bp@alien8.de
    Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    arch/x86/include/asm/mce.h | 1 +
    arch/x86/kernel/cpu/mcheck/mce.c | 11 +++++------
    2 files changed, 6 insertions(+), 6 deletions(-)

    --- a/arch/x86/include/asm/mce.h
    +++ b/arch/x86/include/asm/mce.h
    @@ -264,6 +264,7 @@ static inline int umc_normaddr_to_sysadd
    #endif

    int mce_available(struct cpuinfo_x86 *c);
    +bool mce_is_memory_error(struct mce *m);

    DECLARE_PER_CPU(unsigned, mce_exception_count);
    DECLARE_PER_CPU(unsigned, mce_poll_count);
    --- a/arch/x86/kernel/cpu/mcheck/mce.c
    +++ b/arch/x86/kernel/cpu/mcheck/mce.c
    @@ -643,16 +643,14 @@ static void mce_read_aux(struct mce *m,
    }
    }

    -static bool memory_error(struct mce *m)
    +bool mce_is_memory_error(struct mce *m)
    {
    - struct cpuinfo_x86 *c = &boot_cpu_data;
    -
    - if (c->x86_vendor == X86_VENDOR_AMD) {
    + if (m->cpuvendor == X86_VENDOR_AMD) {
    /* ErrCodeExt[20:16] */
    u8 xec = (m->status >> 16) & 0x1f;

    return (xec == 0x0 || xec == 0x8);
    - } else if (c->x86_vendor == X86_VENDOR_INTEL) {
    + } else if (m->cpuvendor == X86_VENDOR_INTEL) {
    /*
    * Intel SDM Volume 3B - 15.9.2 Compound Error Codes
    *
    @@ -673,6 +671,7 @@ static bool memory_error(struct mce *m)

    return false;
    }
    +EXPORT_SYMBOL_GPL(mce_is_memory_error);

    DEFINE_PER_CPU(unsigned, mce_poll_count);

    @@ -734,7 +733,7 @@ bool machine_check_poll(enum mcp_flags f

    severity = mce_severity(&m, mca_cfg.tolerant, NULL, false);

    - if (severity == MCE_DEFERRED_SEVERITY && memory_error(&m))
    + if (severity == MCE_DEFERRED_SEVERITY && mce_is_memory_error(&m))
    if (m.status & MCI_STATUS_ADDRV)
    m.severity = severity;


    \
     
     \ /
      Last update: 2017-06-12 00:26    [W:4.115 / U:0.040 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site