Messages in this thread | | | Date | Thu, 29 Jun 2017 20:28:57 +0100 | From | Alan Cox <> | Subject | Re: [PATCH v2 1/1] gpio: gpio-wcove: Fix GPIO control register offset calculation |
| |
> So where can I get a handle on the people inside Intel who are obviously > using ACPI GPIO class for shoehorning what we in the linux kernel call > syscon or register bit misc access into the GPIO ACPI container just > because they feel it is convenient?
It's a Windowsism and since Windows is the primary OS shipped the vendors of client platforms do what is needed to make Windows work nicely.
> They need to invent a NEW ACPI four-character thing and call that > "misc register bit" (_MRB?) or whatever and have it bind to syscon. > This is not working.
Short of Microsoft adopting such a standard I don't think it would make any difference (beyond making life worse because you'd have a new _MRB that wasn't used by Windows so nobody ever tested).
> It feels like I am starting to maintain Intel's swiss army knife for misc > register manipulation, and that should not be done by "virtual GPIO" > because just look at it:
It's an ACPIism not an Intelism. I expect it's there on other vendors devices and the same things will pop up as Windows/ARM platforms with ACPI appear.
> General-purpose input/output - yeah that sounds like something > going in/out of the system right?
It's become an ACPI interface for controlling all sorts of system state in a way that works nicely in Windows. Rightly or wrongly that's the situation and we are still the tail not the dog.
Alan
| |