Messages in this thread | | | Subject | Re: [PATCH 13/17] RISC-V: Add include subdirectory | From | Benjamin Herrenschmidt <> | Date | Sat, 24 Jun 2017 10:42:05 -0500 |
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On Fri, 2017-06-23 at 19:01 -0700, Palmer Dabbelt wrote: > > > +#define mmiowb() __asm__ __volatile__ ("fence io,io" : : : "memory");
I forgot if we already mentioned that but mmiowb is primarily intended to order MMIO stores vs. a subsequent spin_unlock.
I'm not sure an IO only fence is sufficient here.
Note that I've never trusted drivers to get that right, it's a rather bad abstraction to begin with, so on powerpc, instead, I just set a per-cpu flag on every non-relaxed MMIO write and test it in spin_unlock in order to "beef up" the barrier in there if necessary.
Cheers, Ben.
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